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Kelly J Tornquist

from Torrance, CA
Age ~42

Kelly Tornquist Phones & Addresses

  • 1103 Portola Ave, Torrance, CA 90501
  • Redondo Beach, CA
  • Los Angeles, CA
  • 508 Hollowell Ave, Hermosa Beach, CA 90254
  • Manchester, NJ
  • Lakehurst, NJ
  • Ypsilanti, MI

Publications

Us Patents

Method Of Exposing Circuit Lateral Interconnect Contacts By Wafer Saw

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US Patent:
7662669, Feb 16, 2010
Filed:
Jul 24, 2007
Appl. No.:
11/782488
Inventors:
Patty Pei-Ling Chang-Chien - Redondo Beach CA,
Kelly Jill Tornquist Hennig - Torrance CA,
Ken Wai-Kin Ho - Alhambra CA,
Ann Kent-Ming Ho - Temple City CA,
Assignee:
Northrop Grumman Space & Mission Systems Corp. - Los Angeles CA
International Classification:
H01L 21/00
US Classification:
438113, 438107
Abstract:
A method for fabricating wafer-level packages including lateral interconnects. The method includes precutting a cover wafer at the locations where the cover wafer will be completely cut through to separate the wafer-level packages. The cover wafer is bonded to the substrate wafer using bonding rings so as to seal the integrated circuit within a cavity between the cover wafer and the substrate wafer, where the precuts face the substrate wafer. The cover wafer is then cut at the precut locations to remove the unwanted portions of the cover wafer between the packages and expose contacts or probe pads for the lateral interconnects. The substrate wafer is then cut between the wafer-level packages to separate the packages.

Wafer Level Packaging Integrated Hydrogen Getter

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US Patent:
7777318, Aug 17, 2010
Filed:
Jul 24, 2007
Appl. No.:
11/782460
Inventors:
Kelly Jill Tornquist Hennig - Torrance CA,
Patty Pei-Ling Chang-Chien - Redondo Beach CA,
Xianglin Zeng - Monterey Park CA,
Jeffrey Ming-Jer Yang - Cerritos CA,
Assignee:
Northrop Grumman Systems Corporation - Los Angeles CA
International Classification:
H01L 23/20
US Classification:
257682
Abstract:
A wafer-level package that employs one or more integrated hydrogen getters within the wafer-level package on a substrate wafer or a cover wafer. The hydrogen getters are provided between and among the integrated circuits on the substrate wafer or the cover wafer, and are deposited during the integrated circuit fabrication process. In one non-limiting embodiment, the substrate wafer is a group III-V semiconductor material, and the hydrogen getter includes a titanium layer, a nickel layer, and a palladium layer.

Support Structures For On-Wafer Testing Of Wafer-Level Packages And Multiple Wafer Stacked Structures

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US Patent:
7919839, Apr 5, 2011
Filed:
Jul 24, 2007
Appl. No.:
11/782497
Inventors:
Patty Pei-Ling Chang-Chien - Redondo Beach CA,
Kelly Jill Tornquist Hennig - Torrance CA,
Assignee:
Northrop Grumman Systems Corporation - Los Angeles CA
International Classification:
H01L 23/02
US Classification:
257678, 257774, 257E2159, 257 48
Abstract:
A semiconductor structure, such as a wafer-level package or a vertically stacked structure. The wafer-level package includes a substrate wafer on which an integrated circuit is formed. A cover wafer is bonded to the substrate wafer to provide a cavity between the substrate wafer and the cover wafer in which the integrated circuit is hermetically sealed. Vias are formed through the substrate wafer and make electrical contact with signal and ground traces formed on the substrate wafer within the cavity, where the traces are electrically coupled to the integrated circuit. Probe pads are formed on the substrate wafer outside of the cavity and are in electrical contact with the vias. A support post is provided directly beneath the probe pad so that when pressure is applied to the probe pad from the probe for testing purposes, the support post prevents the substrate wafer from flexing and being damaged.

Monolithically Integrated Switchable Circuits With Mems

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US Patent:
2006017, Aug 3, 2006
Filed:
Jan 28, 2005
Appl. No.:
11/046604
Inventors:
Jeffrey Yang - Cerritos CA,
Matt Nishimoto - Torrance CA,
Gregory Rowan - Redondo Beach CA,
Kelly Tornquist - Torrance CA,
Patty Chang-Chien - Redondo Beach CA,
International Classification:
H03H 7/38
US Classification:
333032000
Abstract:
A reconfigurable circuit and a related method for its use, the circuit including multiple microelectromechanical systems (MEMS) switches connected between selected points in the circuit. The MEMS switches are controlled to select a desired circuit condition, such as an impedance matching condition, and then the switch conditions may be fused permanently. In the context of an impedance matching circuit, the MEMS switches may be used to optimize matching after circuit fabrication or after packaging, thereby allowing optimization even after potentially performance changing events.
Kelly J Tornquist from Torrance, CA, age ~42 Get Report